Does Google design its own TPUs or does Broadcom?

Both, and the split is the point. Google owns the architecture, the compiler stack and the systems design that make TPUs useful for its own workloads. A co-design partner — historically Broadcom — contributes physical implementation, high-speed SerDes, packaging expertise and the path to a manufacturable tapeout. Calling a TPU 'a Broadcom chip' or 'a Google chip' both miss it: hyperscaler accelerators are joint products where the hyperscaler owns the intent and the partner owns much of the silicon engineering.

Why did Google add Marvell as a TPU partner in August 2026?

Second-sourcing. Marvell issued Google a warrant on August 18, 2026 for up to 58,970,907 shares at $206.58 — about $12.2 billion — vesting in tranches reported as tied to each $500 million of chip purchases, covering custom silicon that attaches to the TPU ecosystem. A single co-design partner means that partner's capacity constraints become your product delays and its margin expectations become your cost floor. At Google's spending scale, a second design partner is cheap insurance.

What does 'attaches to the TPU ecosystem' actually mean?

It points at the components surrounding the accelerator rather than the accelerator core: networking silicon, interconnect, SerDes, custom I/O and the high-bandwidth fabric that determines whether a pod of TPUs behaves like one coherent machine. In large-scale training this plumbing frequently decides delivered performance more than peak FLOPS does, which is why it is a credible place to add a second supplier without disturbing the core roadmap.

Should developers care which company designs the silicon?

Indirectly, and mostly through price and availability. You do not program a TPU differently because Marvell built the interconnect. What changes is supply: more design partners means more capacity, more competitive pricing pressure and less risk that one tapeout slip stalls a generation. For anyone renting accelerators, supplier diversity in the design layer eventually shows up as cheaper and more available instances.

Quick Answer

Google TPU vs Broadcom vs Marvell Custom AI Silicon

Published: August 24, 2026

The Short Answer

Custom AI silicon is not one company’s product. In 2026 the hyperscaler accelerator business is a layered supply chain, and the August 2026 Google-Marvell agreement is best read as a hyperscaler widening its bench.

	Google (TPU owner)	Broadcom	Marvell	AMD
Role	Architecture, compiler, systems	Principal co-design partner	New co-design partner (Aug 2026)	Merchant silicon + custom work
Owns the workload	✅ Yes	❌ No	❌ No	❌ No
Owns physical implementation	⚠️ Partly	✅ Substantial	✅ Growing	✅ For its own parts
Strength	Knowing what to build	SerDes, packaging, scale	Networking, interconnect, custom I/O	GPU roadmap, open software
2026 status	Multi-generation TPU program	Incumbent, under pressure	Warrant deal signed Aug 18, 2026	Named in the widening supplier set
Exposure if Google shifts	—	High	Upside	Moderate

Verified August 24, 2026.

The Layer Nobody Names Correctly

Ask who makes Google’s TPUs and you get three confidently wrong answers. The accurate version has three layers:

1. Workload and architecture — Google. The reason a TPU exists is that Google knows precisely what its own training and serving workloads do: the matrix shapes, the memory access patterns, the collective communication profile. This is the layer nobody can outsource, and it is why hyperscaler accelerators beat merchant silicon on their home workloads while losing badly on general-purpose ones.

2. Physical implementation — the co-design partner. Turning an architecture into a manufacturable chip is enormously specialized: SerDes, physical design, packaging, HBM integration, yield engineering, and the tapeout relationship with the foundry. Broadcom has historically owned much of this for Google.

3. Systems and fabric — increasingly contested. At scale, an accelerator is only as good as the network between accelerators. Interconnect and I/O silicon determine whether thousands of chips act as one machine. This is exactly the ground the Marvell agreement covers.

What Changed in August 2026

Reporting the week of August 17, 2026 confirmed that Marvell and Google agreed to co-develop custom AI silicon attaching to the TPU ecosystem, with Marvell issuing Google a warrant dated August 18, 2026 for up to 58,970,907 shares at $206.58 — approximately $12.2 billion at full exercise — vesting in tranches reported as tied to each $500 million of chip purchases. Marvell stock rose about 10%. Coverage around August 20, 2026 framed Marvell and AMD together as reshaping the Google TPU supplier race, putting pressure on Broadcom and MediaTek.

Marvell management has guided custom AI chip revenue to more than double to over $4 billion in the coming year and exceed $10 billion by 2028, with fiscal Q2 2026 results due August 27, 2026 — the first hard data point against the announcement.

Why Hyperscalers Second-Source

The strategic reasoning is dull and correct:

Schedule risk. Custom silicon runs on multi-year cycles with hard tapeout dates. One partner’s capacity crunch becomes your missed generation, and there is no spot market for a chip that does not exist.
Pricing leverage. A sole co-design partner sets your cost floor. A second one makes the first one negotiate.
Capability breadth. Networking, packaging and accelerator core work are genuinely different specialisms. Optimal allocation rarely lands entirely inside one vendor.
Roadmap insurance. If a partner is acquired, redirects strategy, or prioritizes a competing hyperscaler, a program with no alternative is stuck.

None of this is a verdict on Broadcom’s execution. It is what a company spending at Google’s scale does once the spending gets large enough that insurance is rounding error.

What It Means Versus Nvidia

The custom silicon story is often framed as an Nvidia threat. The more accurate framing is workload segregation.

Hyperscaler ASICs win where the workload is known, stable, enormous and internal. That describes serving a fixed model family at planetary scale extremely well. Merchant GPUs win where the workload is unknown, changing weekly, and belongs to a customer who wants portability — which describes most of the market renting compute in 2026.

The competitive pressure is real but indirect: every TPU generation that absorbs Google’s internal demand is demand that does not appear in a merchant vendor’s order book. That is a slow squeeze on growth rate, not a displacement event.

What Developers Should Take From It

Almost nothing changes in your code, and something real changes in your bill.

More design partners → more capacity → downward price pressure on accelerator rental, with a lag measured in quarters, not weeks.
Supplier diversity reduces the odds that one tapeout slip constrains a whole generation of available instances.
Portability stays the practical hedge. The reason to keep your inference stack accelerator-agnostic is not ideology; it is that the price-performance leader keeps changing, and 2026 changed it several times.

Watch the tranche disclosures rather than the headline. A $12.2 billion warrant that vests $500 million at a time is a forecast that only becomes a fact one tranche at a time.